1. Field of the Invention
The present invention relates generally to the manufacture of non-volatile memory devices, and more particularly to an improved method of forming a charge injection region on a floating gate of a memory cell.
2. Description of Related Art
In a non-volatile memory cell charge is stored on a floating gate comprised of a silicon body surrounded by a suitable insulator such as silicon dioxide. Typically, this floating gate is overlaid by a second conductive layer called the control gate which is connected to the circuit and has high voltage applied to it to cause charge to move across the insulating barrier.
One method to speed the process of removing charge from the floating body while keeping applied voltages low is to form a pointed feature on the body which enhances the electric field. In the simplest implementation of this idea, a square corner is formed when the body is defined and then the overlying conductor is shaped such that it wraps around this comer.
In Jenq, U.S. Pat. No. 5,278,087, a specific implementation of a source side injection NVRAM memory cell is disclosed. In this disclosure, a method to form injectors with an angle of less than the 90 degree square corner (and thus a higher electric field) is disclosed. In Jenq, a silicon layer is overlaid with a suitable oxidation blocking layer, e.g. silicon nitride, and an opening in this upper layer is made. The silicon is then oxidized. Due to the masking properties of the overlayer, and the fact that silicon oxidation grows "into" the silicon, a sloped recess is formed in the silicon film at the mask edge. The overlayer is then removed selectively to the silicon body and the silicon dioxide. Finally, the silicon layer is etched with an anisotropic dry etch such that what remains is the silicon dioxide layer with the portion of the silicon film beneath it. The resulting floating gate body will have a comer sharper than 90 degrees determined by the relative amount of oxidation and the specifics of the masking layer and oxidation process used.
"Scaling" is a necessary requirement of reducing costs of semiconductor components particularly in the field of very large scale integration (VLSI). The most obvious aspect of "scaling" is a reduction of the lengths and widths of specific features of semiconductor devices which usually requires a vertical scaling of the thickness of the films which are used to make the device. When a silicon film is oxidized it tends to oxidize faster along grain boundaries. In some cases the film will be broken up into individual islands. The oxidation may even proceed to the underlying single crystal silicon substrate which is the conductive channel for the device. The net result is that at some point in the scaling of the memory cell the oxidation process used to form the injection point becomes non-manufacturable.
A difficulty of Jenq is that the nature of the interface between the original silicon film and the overlying oxidation mask is critical. Any oxide, such as may grow in the room air or during insertion into a deposition tool used to produce the masking layer, provides an unintended path for oxidation and may enlarge and/or distort the shape of the final structure.
A further limitation of Jenq is that the resulting floating gate structure must have silicon dioxide as the insulator between itself and the control gate (since oxidation is used to provide this insulation) and the total thickness of the insulating layer is inherently restricted by the thickness of the silicon film (e.g. in the extreme limited to the result of total consumption of the film by oxidation).
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a method of forming a charge injection region on a floating gate.
It is another object of the present invention to provide a method of forming sharp corners in the gate material of a floating gate structure.
A further object of the invention is to provide a method of forming sharp corners on a floating gate of a memory cell with the minimum geometry allowed by lithography.
It is yet another object of the present invention to provide a method of alleviating oxidation size limitations on a floating gate of a memory cell.
It is yet another object of the present invention to provide a method of alleviating limits on the choice of insulator materials in forming a floating gate on a memory cell.
Still other objects and advantages of the invention will be in part obvious and will in part be apparent from the specification.